axi4-lite 开源项目推荐（100 个）

pulp-platform /axi

用于高性能片上通信的 AXI SystemVerilog 可综合 IP 模块与验证基础设施

dpretet /axi-crossbar

Parametric AXI4 crossbar in SystemVerilog

OSVVM /AXI4

AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

mmxsrup /axi4-interface

AX 4和AX 4-Lite接口定义

ultraembedded /core_usb_host

Basic USB 1.1 Host Controller for small FPGAs

ultraembedded /core_audio

Audio controller (I2S, SPDIF, DAC)

ultraembedded /core_usb_bridge

USB -> AXI Debug Bridge

ic-lab-duth /NoCpad

HLS for Networks-on-Chip

VHDL /Interfaces

Interface definitions for VHDL-2019.

somyadashora /AMBA-AXI4-Lite

主机和从机使用AMBA AJI4 Lite协议制成。

arhamhashmi01 /Axi4-lite

This repository contains the implementation of AXI4-Lite interface protocol on system verilog for FPGA/ASIC communication. Modular codebase with example designs and testbench.

nelsoncsc /verilaxi

SystemVerilog AXI verification library and video-DMA IP: AXI4/Lite/Stream BFMs, triple-buffer VDMA, and multi-tap temporal VDMA with byte-exact real-image round-trip tests. Verilator · Yosys · Docker · CI.

gokeshenzhen /gen-tb-skill

Claude Code / Codex CLI skill that scaffolds a runnable UVM testbench (APB / AHB-Lite / AXI4-Lite + generic-bus fallback) from an IP spec and register table, with a UVM-sequence flow for DV and a tb_api:: task BFM for DE.

axi-security /eXpect

eXpect框架中的正式AXI验证属性，用于安全的SOC验证

dpretet /meduram

Multi-port BRAM IP for ASIC and FPGA

bugratufan /axion-hdl

Axion-HDL: Automated AXI Register Space Generation Tool

MicroTCA-Tech-Lab /hectare

VHDL generator from SystemRDL

dighrasker /MultiCore_L2_Cache

A UVM-based verification environment for a multi-core, write-back L2 cache on 32-bit RISC-V, enforcing MESI coherence with L1 caches and interfacing to DRAM over AXI4-Lite.

portlandhodl /Tri-Mode-MAC-to-AXI-Buffer

AXI4 LITE buffer for the OpenCores Trimode Ethernet MAC. Includes SIM.

GSTL-ITU /HORNET-RV32IMF

一款针对现场可编程逻辑器件（Nexys Video/4-DDRISC-V）优化的5级流水线RV 32 IMF RISC-V SOC。具有定制的IEEE-754 FPU、中断驱动的ASIC和各种外围设备。