digital-design 开源项目推荐（1,542 个）

baquer /GATE-and-CSE-Resources-for-Students

📚📖📚CSE GATE Resources for GATE and CSE Aspirants😎😁.显示您的通过️️️

iic-jku /IIC-OSIC-TOOLS

IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

DrWaleedAYousef /Teaching

Waleed A博士的教学材料Yousef

librelane /librelane

ASIC 实现流程基础设施，OpenLane 的继任者

ai-hpc /ai-hardware-engineer-roadmap

掌握AI推理、AI代理利用系统和硬件工程——然后设计一个实体AI芯片。这就是目标。

thedatabusdotio /fpga-ml-accelerator

This repository hosts the code for an FPGA based accelerator for convolutional neural networks

chenyuliu577-cyber /jyd-rv32i-fpga-core

Educational RV32I FPGA CPU/SoC project organized for JYD RISC-V contest-style Vivado reconstruction and verification.

meiniKi /FazyRV

一个极小面积的 RISC-V 核心，具有可扩展至 1、2、4 或 8 位的数据路径以及多种变体。

maxisimonazzi /Azukar-FPGA

Open-source FPGA development board for education and digital design learning. Designed for accessibility, reproducibility and seamless integration with open FPGA toolchains for students, makers and academic environments.

erfnzdeh /verilog-fpga-parking-management-system

Synthesisable Verilog controller for a 700-space university car park: independent occupancy and availability tracking for university and visitor vehicles against one shared capacity, with a transcript-generating testbench and an Intel Quartus project.

Ghonimo /Pre_Silicon-AHB-to_APB-Verification

针对AHB 2APB Bridge设计的全面验证套件，具有SystemVerilog和基于UVMs的方法论。🌉🚀

fpgaemu /fpgaemu

Introduction to FPGA emulation and digital design. This capstone project was part of the 2021 University of San Diego Shiley-Marcos School of Engineering & Computing Showcase.

HarieshAnbalagan /RV32I

Minimalistic RV32I RISC-V Processor in System Verilog

IvesLiu1026 /NYCU-ICLAB-2026-Fall

Selected digital IC designs, architecture explanations, and measured results for NYCU ICLAB, Fall 2026.

PyLCARS /PythonUberHDL

Educational materials and tooling for digital HDL synthesis in Python with myHDL

bensampson5 /libsv

An open source, parameterized SystemVerilog digital hardware IP library

meiniKi /RV32I_SC_Logisim

A minimalistic single-cycle RISC-V platform for demonstrational and educational purposes in Logisim Evolution.

fcayci /vhdl-digital-design

VHDL code examples for a digital design course

arasgungore /NandGame

Solutions for The Nand Game, a game that teaches the fundamentals of computing by building a computer from scratch.

bighardperson /-CPU-

Verilog miniRV/RISC-V style CPU course project featuring single-cycle and five-stage pipeline designs with hazard handling.