asic-design 开源项目推荐（206 个）

hughperkins /VeriGPU

开源 GPU，使用 Verilog 编写，大致基于 RISC-V ISA

chipsalliance /Cores-VeeR-EH1

VeeR EH1 core

librelane /librelane

ASIC 实现流程基础设施，OpenLane 的继任者

google /qkeras

QKeras: a quantization deep learning library for Tensorflow Keras

dpretet /async_fifo

用 Verilog 编写的双时钟异步 FIFO，已使用 Icarus Verilog 测试

abdelazeem201 /Systolic-array-implementation-in-RTL-for-TPU

IC implementation of Systolic Array for TPU

chipsalliance /Cores-VeeR-EL2

VeeR EL2 Core

lirui-shanghaitech /CNN-Accelerator-VLSI

卷积加速器内核，目标ASIC和FPGA

dpretet /axi-crossbar

Parametric AXI4 crossbar in SystemVerilog

cpc /openasip

Open Application-Specific Instruction Set processor tools (OpenASIP)

thousrm /universal_NPU-CNN_accelerator

hardware design of universal NPU(CNN accelerator) for various convolution neural network

AUCOHL /DFFRAM

Standard Cell Library based Memory Compiler using FF/Latch cells

KastnerRG /cgra4ml

An Open Workflow to Build Custom SoCs and run Deep Models at the Edge

keplertech /kepler-formal

Digital Design Equivalence Checking

Weiyet /MakerCode_RTLChallenge

Public RTL Question Bank of MakerCode https://makercode.jixiao-ai.com/

JeffDeCola /my-verilog-examples

A place to keep my synthesizable verilog examples.

VardhanSuroshi /VLSI-ASIC-Design-Flow

This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tape-It-Out

WilliamZhang20 /ECE298A-TPU

A custom AI chip to be taped out soon!

abdelazeem201 /Design-and-ASIC-Implementation-of-32-Point-FFT-Processor

I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. A single-path delay commutator processing element (SDC PE) has been proposed for the first time. It saves a complex adder compared with the typical radix-2 butterfly unit. The new pipelined architecture can be …

shrine-maiden-heavy-industries /torii-hdl

基于 Python 的 HDL 与框架，用于硅基魔法。