wishbone 开源项目推荐（71 个）

ZipCPU /zipcpu

一个体积小、重量轻的RJ中央处理器软核

ZipCPU /wb2axip

Bus bridges and other odds and ends

ZipCPU /sdspi

SD-Card controller, using either SPI, SDIO, or eMMC interfaces

ZipCPU /wbuart32

A simple, basic, formally verified UART controller

ZipCPU /autofpga

A utility for Composing FPGA designs from Peripherals

ZipCPU /openarty

An Open Source configuration of the Arty platform

jakubcabal /uart-for-fpga

Simple UART controller for FPGA written in VHDL

ZipCPU /wbscope

A wishbone controlled scope for FPGA's

lxp32 /lxp32-cpu

A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set

ZipCPU /s6soc

CMod-S6 SoC

ZipCPU /dbgbus

A collection of debugging busses developed and presented at zipcpu.com

lingbai-kong /computer-system

同济大学CS《计算机系统实验》实验二TongJi University CS computer system experiment assignment 2《自己动手写 CPU》SOPC实现与操作系统移植

ZipCPU /wbfmtx

A wishbone controlled FM transmitter hack

daringpatil3134 /SPI_Serial_Peripheral_Interface_Verilog_Modules

Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device

pbing /ibex_wb

RISC-V Ibex core with Wishbone B4 interface

BLangOS /VexRiscV_with_HW-GDB_Server

VexRiscV system with GDB-Server in Hardware

hotwolf /WbXbc

HDL components to build a customized Wishbone crossbar switch

ZipCPU /wbicapetwo

Wishbone to ICAPE interface conversion

merledu /caravan

A caravan equipped with API for creating bus protocols in Chisel with ease.

PacoReinaCampo /MPSoC-DMA

Direct Access Memory for MPSoC