altera-fpga 开源项目推荐（82 个）

drandyhaas /HaasoscopePro

经济实惠的2 GHz 3.2 GS/s 12位开源开源可扩展USB实时示波器

ultraembedded /openlogicbit

为各种FPGA开发板/商业化逻辑分析仪替换门软件提供的开源逻辑分析仪门软。

mbtaylor1982 /ReSDMAC

Verilog code to replace the Commodore SDMAC found in the A3000

robseb /HPS2FPGAmapping

SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)

MUDAL /Altera_FPGA_Projects

Custom Altera FPGA designs by Olaoluwa Raji. This repository contains numerous projects that were successfully implemented on an Altera Cyclone IV FPGA using VHDL.

Multimedia-Processing /Digital-Logic-Design

透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。

alvarezpj /single-cycle-cpu

VHDL implementation of a 1 Hz single cycle CPU that supports recursive function calls

ThePituLegend /RISC-V_DE10-Nano

This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.

Davide-DD /mastermind

FPGA implementation of the popular logic game using VHDL and Altera DE1

mrLSD /fpga

Research & Development FPGA projects for different boards

rafafigueredoviana /RISCV_MCU_CYCLONEV

A basic implementation of the RISCV core into a DE10nano FPGA board.

atmughrabi /AccelGraph

Graph Processing Framework that supports || OpenMP || CAPI

XAli-SHX /Implementation-of-an-Edge-Detection-Filter-Using-the-Avalon-Interface

Implementation of an Edge Detection Filter Using the Avalon Interface

mateuspinto /FPGA_Verilog_Ballot_Box-TP2-ISL-UFV

Hardware description of a complete Ballot Box made in Verilog with implementation in FPGA-Altera-DE-2-155, made in Verilog with Quartus Prime in discipline ISL for computer science graduation.

lazyoracle /vhdl-processor

An 8-bit processor in VHDL based on a simple instruction set

MKme /fpga

FPGA and CPLD programming, tutorials and information I figure out.

lstolcman /bachelor-thesis

论文涵盖了在FPGA环境中应用的软件定义无线电技术中的数字信号处理研究。该书完全用波兰语撰写，唯独没有英文摘要

Terminatorjjjjj /NTUEE-DCLAB-Materials

This repo is the lab materials for NTUEE DCLAB (http://dclab.ee.ntu.edu.tw).

mohamedtareq24 /4_Channel_Logic_Analyzer

FPGA based Logic analyzer designed then FPGA implemented on ALTERA cyclone IV FPGA

Jjateen /Snake-Game-Verilog

This repository showcases a Verilog-based Snake and Apple Game, developed for the ECL 106: Digital System Design with HDL course. Running on an Altera DE10-Lite FPGA board and displayed on a VGA monitor, players control a snake to collect apples while avoiding obstacles. The snake grows longer with each apple, making the game progressively harder.