vlsi-physical-design 开源项目推荐（117 个）

limbo018 /DREAMPlace

支持深度学习工具包的LSI放置

OpenTimer /OpenTimer

A High-performance Timing Analysis Tool for VLSI Systems

AUCOHL /DFFRAM

Standard Cell Library based Memory Compiler using FF/Latch cells

cuhk-eda /dr-cu

Dr. CU, VLSI Detailed Routing Tool Developed by CUHK

AngeloJacobo /OpenLANE-Sky130-Physical-Design-Workshop

Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130

OpenTimer /Parser-Verilog

A Standalone Structural Verilog Parser

lip6 /coriolis

Coriolis VLSI EDA Tool (LIP6)

luckyrantanplan /nthu-route

VLSI EDA Global Router

chengengjie /salt

Steiner Shallow-Light Tree for VLSI Routing

shariethernet /Physical-Design-with-OpenLANE-using-SKY130-PDK

This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In this project, a PicoRV32a SoC is taken and then the RTL to GDSII Flow is implemented with Openlane using Skywater130nm PDK. Custom-designed standard cells with Sky130 PDK are also used in the flow. Timing Optimisa…

OpenTimer /Parser-SPEF

A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).

VardhanSuroshi /VLSI-ASIC-Design-Flow

This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tape-It-Out

ShonTaware /OpenSource_Physical_Design

This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK

twweeb /VLSI-Physical-Design-Automation

Courseworks of CS6165 VLSI Physical Design Automation, NTHU.

ieee-ceda-datc /RDF-2019

DATC RDF

UdayaShankarS /TCL-Scripting

Examples of the TCL Scripts for different purposes and for VLSI Physical Design are provided here for your reference

hibagus /64pointFFTProcessor

Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.

jinwookjungs /lefdef_util

一个LEF/DEF实用工具。

andrsmllr /magic_vlsi_examples

Some simple examples for the Magic VLSI physical chip layout tool.

meeeeet /RTL-to-GDS-Implementation-of-SerDes

该项目在 GitHub 上没有填写描述