physical-design-automation 开源项目推荐（19 个）

FelipeFFerreira /ITA-CORES

RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32

twweeb /VLSI-Physical-Design-Automation

Courseworks of CS6165 VLSI Physical Design Automation, NTHU.

EricLu1218 /Physical_Design_Automation

NTHU CS6135 VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing Floorplan Design, Placement Legalization, Global Routing)

azwad-tamir /gpt_gnn_3D_partitioner

A GPT-GNN based verilog netlist partitioner for 3D IC design

Koyama-Tsubasa /VLSI_Physical_Design_Automation

Coursework of NTHU CS613500 VLSI Physical Design Automation

MaoMao0414 /NTHUCS_VLSIPDA_2023

Courseworks of VLSI Physical Design Automation, NTHU CS course teached by prof. Ting-Chi Wang in fall 2023

therealczr15 /NYCU_PDA_2024F

Fall 2024 NYCU Physical Design Automation (PDA)

e3da /PowerSynth2-core

This is the PowerSynth backend with the command line interface (CLI)

e3da /PowerSynth2-gui

This is the cross-platform PowerSynth 2 front end based on QT

luk036 /physdes-cpp

🧱 Physical design C++ Code

e3da /PowerSynth1-src

PowerSynth 1 Series (v1.0-v1.9) Source Code

e3da /PowerSynth2-pkg

This contains the materials for the PowerSynth 2 release package excluding the source code

Uttejvluda /ECE-Roadmap

A Roadmap application for ECE students from NIT college student based knowledge

ridash2005 /AutoPlacer

Automated VLSI Placement Engine optimizing wirelength and density using hybrid analytical and stochastic algorithms. Supports Verilog-to-DEF flows with interactive congestion visualization

e3da /PowerSynth1-pkg

PowerSynth 1 Series (v1.0-v1.9) Package Materials

luk036 /ckpttnpy

✂️ Circuit Partitioning Python Code

YubiYubi719 /NYCU-Physical-Design-Automation

NYCU Physical Design Automation

ChiaChunYu /VLSI-Physical-Design-Automation

Homework of NTHU CS613500 VLSI Physical Design Automation (2025 Fall)

flippercardiographic198 /VLSI-project

Build a 16-bit picoComputer FPGA CPU with FSM control, instruction execution, and peripheral I/O for VLSI and digital design projects