开源DDR3控制器
phy 开源项目推荐(39 个)
phy 话题在 GitHub 上没有填写简介,这里按 Star 数汇总最相关的热门仓库。
热门项目 前 20
按 Star 数排序展示前 20 个 · GitHub 共 39 个仓库USB3 SuperSpeed (5Gbps) and SuperSpeedPlus (10Gbps) for FPGAs without external chip: PHY + Device Core in LiteX.
基于FPGA的MII转RMII和SMII转换器,用于连接100M以太网PHY芯片,如LAN8720或KSZ8041TLI-S。基于FPGA的MII转RMII和MII转SMII,用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。
Everything you need to know on how to connect the LAN8720 PHY to the ESP32.
An HDL design for sending data over Ethernet
Simple and modern C++ libraries for parsing the various Source Engine formats
Open Sigfox Stack Reference Implementation - Physical Layer for SDR
Opensource DDR4 Controller
该项目在 GitHub 上没有填写描述
Go package for parsing Source Engine StudioModel formats (.mdl, .vtx, .vvd, .phy)
External PHY RTL8201F with switch RTL8305NB and 2xHR871181A
Multi-protocol physical-layer testbed orchestrator: scenario DSL, clock-alignment model, event-log builder, interference-matrix automation, and cross-protocol RF/embedded case studies (offline, stdlib-only).
Let's see how fast and accurate we could detect 5G NR slot boundary
Plugins to Phy1 - additional features to Phy
ESP-NOW security overview — protocol analysis, frame capture and keyed-exchange tests on ESP32.
XTS-AES side-channel analysis - timing/EM leakage measurement and countermeasure evaluation.
Python module for 5G NR sync signals and decoding.
Neural Signal Analysis
External PHY RTL8201F with HR871181A
C++23 LoRa PHY transceiver and wideband scanner built on MIT Radio 4, paired with a Python toolchain for monitoring, decoding, and telemetry
关于这个话题
- 清单取自 GitHub 话题页并按 Star 数排序,每次展示前 20 个项目;原始页面见 https://github.com/topics/phy。
- 该话题在 GitHub 上共有 39 个仓库, 本站收录的是其中最热门的 20 个,不是全量列表。
- Star / Fork 每日自动刷新一次,实时数据以 GitHub 为准。
- 当前 20 个项目累计 1131 Star,覆盖 7 种主要语言,数据更新于 2026-11-13。
- 中文介绍来自 GitHub 官方话题说明(github/explore)的机器翻译,可点「查看原文」对照;译文缺失时会先展示原文。