pnr 开源项目推荐（50 个）

chipfoundry /openlane2

下一代OpenLane，从零重写，采用模块化架构

RAJIV81205 /RailKit

A comprehensive Node.js package for Indian Railways ,train services. Get real-time PNR status, detailed train information, and live train tracking with complete route details.

ghdl /docker

Scripts to build and use docker images including GHDL

basemhesham /Design-and-ASIC-Implementation-of-UART

This repository presents ASIC design flow for UART utilizing RTL to GDS implementation This has been simulated on VCS and has been implemented by using Verilog description language which has been synthesized using Design Compiler and Back End design using Synopsys IC Compiler II

abdelazeem201 /ICC2_scripts

This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of ORCA which was taped-out by NTI.

yomnahisham /ts-verilog-simulator

A web-based Verilog simulator for designing, running, and visualizing RTL code in-browser.

abdelazeem201 /ASIC-Implementation-UART

This paper presents design of UART module for serial communication used for short-distance, low speed and exchange of data between computer and peripherals. UART mainly contains Transmitter, Receiver and Baud Rate Generator. Baud Rate Generator generates the clock for the UART. We can achieve the desired Baud Rate by using divide factor from sys…

mohamedtareq24 /ASICs_Design_Diploma

RTL to GDSII flow of a low Power configurable multi clock digital system

porglezomp /minecraft-eda

Electronic design automation for Minecraft

abdelazeem201 /RV32E201X

RV32E201X is a 5-stage pipelined 32-bit RISC-V processor core.

crackCodeLogn /PNR_Enquiry_IndianRailways_v2.0

This project caters to the extraction of the status of PNR number (Passenger Name Record) of Indian Railways. PNR number is unique to each and every ticket bought in the railways. With the help of it, we can get the exact details of the ticket in hand

AkshayXPatil /Physical-Layout-Design

Complete design of USART interface with baud rate selection

mohamedtareq24 /ASIC_implementation_of_PULPino_SoC

My Graduation Project for BSc of Engineering Ain Shams Uni which is ASIC implementation of PULPino SoC based on the cv32e40p (RISCY) core sponserd by ICpedia using Synopsys tools

kholoud0 /ASIC-implementation-of-CV32E40P-RISC-V-core-

This repository contains my BSc graduation project at the Faculty of Engineering, Ain Shams University. The project focuses on implementing the RISC-V core, specifically the CV32E40 ,with a focus on achieving high performance and maximizing frequency through synthesis, place and route (PNR).

abdelazeem201 /DTMF

Design and Implementation of Goertzel Algorithm for DTMF application on ASIC.

Transavia /ShoppingCartExample

Shopping Cart Example

aviiciii /irctc-pnr-notifier

Notify when your Waiting List moves in IRCTC Trains

vipulwairagade /get-pnr-status

Get Coach, Birth Number and Status from your PNR number

crackCodeLogn /PNR_Enquiry_IndianRailways

This project caters to the extraction of the status of PNR number (Passenger Name Record) of Indian Railways. PNR number is unique to each and every ticket bought in the railways. With the help of it, we can get the exact details of the ticket in hand

splogdes /fuznet

该项目在 GitHub 上没有填写描述