half-adder 开源项目推荐（36 个）

nxbyte /Verilog-Projects

This repository contains source code for past labs and projects involving FPGA and Verilog based designs

bespoyasov /binary-full-adder-in-the-game-of-life

Binary adder implementation in the Game of Life written in JavaScript using canvas.

mcquerol /electronic-systems

包括ADC/DAC、滤波器以及使用NI多重sim的仿真在内的多种电子系统。

abhichandra586 /02-combinational-circuits

Combinational circuits in Verilog - Adders, Subtractor, MUX, Decoder, Encoder, Comparator and 16-bit ALU. Step 2 of 8 in a VLSI portfolio roadmap building to a 16-bit pipelined RISC processor.

Stavros /Multiplier4bit

A 4bit Multiplier in VHDL

shane-staret /SimpleBinaryCalculator

A Java binary calculator based on a system of gates

Zannatul-Naim /Digital-System-Design

Digital System Design Lab Codes using Verilog

ammarmalik17 /Verilog_Adders

This repository contains Verilog HDL implementations of Half Adders, Full Adders, and 4-bit Adders, designed at three different abstraction levels: Gate Level, Dataflow Level, and Behavioral Level. These designs are fundamental to digital electronics, and this project showcases the versatility of Verilog in modeling and simulating digital circuits.

dat-alpaca /dat-emulation-sandbox

A simulation where I can connect virtual logic gates and build virtual CIs.

imvickykumar999 /Logical-Redstone-Reloaded

Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/

joeymaillette04 /VHDL

VHDL implementations of half-adders, full-adders, and a 4-bit adder for digital circuit design

rahul21316 /verilog-adders

All the various adders in Verilog!

aliansgp /VHDL_Adders

Different adders code in VHDL and Comparison

ichko /nand-to-tetris

This repository contains HWs and material from the nand to tetris course

konstantinoszoropoulos /Half_Adder

Digital Circuits: Half Adder.

krish1925 /CS-M152A

Labwork on Logic Design implementation in Verilog on a Basys3 FPGA Module

jgesc /VerilogTests

A repository for some modules I made while learning Verilog

Logic-Design-aka-Uniwa /Adders-Deductors

Digital Design laboratory project demonstrating binary arithmetic circuits, including Half Adder, Full Adder, Half Subtractor, Full Subtractor, with interactive NI Multisim simulations, truth tables, and logical equation analysis (Logic Design, UNIWA).

shane-staret /TwosComplementer

A Java program that converts a binary number into it's two's complement equivalent. This is used within the SimpleBinaryCalculator repository.

pralaynaskar /verilog-digital-circuits

A collection of Digital Logic Design circuits implemented in Verilog HDL, including basic logic gates, adders, and multiplexers with simulation testbenches.