digital-logic-simulator 开源项目推荐（34 个）

fuad1502 /oombak

Oombak 是一个可在终端运行的交互式 SystemVerilog 仿真器 UI！

matijakevic /mcircuit

一款受Logisim启发的数字逻辑模拟器。

raycar5 /logicsim

用 Rust 实现的可组合数字逻辑仿真！

d-khalid /IRis

使用 C# 和 Avalonia UI 构建的数字逻辑仿真器。可根据用户提示和电路图图像生成完整可仿真电路。

devjoseadolfo /LogicBoard

 WWDC23 Swift Student Challenge Submission

First-Sem-C-Project /Minimalogic

C project for first sem

agausmann /FlipFlop

A digital logic simulator built on simple rules.

hanimuhamed /nandScape

digital logic simulation sandbox

CircuitVerse /Blog

Blog for updates from circuitverse

lubinpappalardo /digital-logic-sim

Lubin Pappalardo's official Digital Logic Simulator.

jack-mil /atpg-toolkit

Digital logic circuit simulation, deductive fault simulation, and PODEM test pattern generation library

pawan-nirpal-031 /ComputerArchitecture-MicroprocessorDesign

Basic Microprocessor Design in HDLs like Verilog.

EV-OD /Digital-Logic

该项目在 GitHub 上没有填写描述

L3tum /DigitalLogicSimulator

该项目在 GitHub 上没有填写描述

JatinChopra /8-bit-CPU

This is a functional 8-bit CPU system I made , including ALU, control unit, and memory.

JoeStrout /pixelLogic

Pixel Logic Circuit Simulator

AHMEDxHAGAG /MARIE-From-NAND-Gate

A 16-bit Computer built from NAND gates.

Deepu-Bhai5 /4-bit-binary-subtractor

A 4-bit binary subtractor designed and implemented using logic gates in Logisim.

KornPlays /Digital-Logic-Simulator

Chip and Save editor for Digital Logic Simulator

rougeDAG /TicTacToe---Using-Digital-Logic

A Tic Tac Toe game made completely using digital logic. A semester project for the course Digital System Design