Verilog 图像处理工具箱,使用 Basys3 FPGA
basys3 开源项目推荐(221 个)
basys3 话题在 GitHub 上没有填写简介,这里按 Star 数汇总最相关的热门仓库。
热门项目 前 20
按 Star 数排序展示前 20 个 · GitHub 共 221 个仓库A Single Cycle Risc-V 32 bit CPU
⚙Hardware Synthesis Laboratory Using Verilog
CS4362 - Hardware Description Languages. Implemented SNN on an FPGA for real-time image processing using VHDL
A handwritten digit recognition painter implementation on Basys 3 Artix-7 FPGA using Verilog.
Single Cycle 32 bit MIPS
This repository has basic examples in VHDL using Basys3 board.
👻 Simple Undertale-like game on Basys3 FPGA written in Verilog
Pulse generator on Basys 3 FPGA board
Selected projects from "Applied Digital Logic Exercises using FPGAs", by Kurt Wick.
Morse Code Encoder on Basys 3 [Artix-7, part: xc7a35tcpg236-1]
Digital clock implemented in vhdl for the Basys 3 Board from Digilent.
This is the repo is created for helping fellow Bilkenteers to pass their EEE102 Digital Electronics course. You can find Lab answers from Lab 1 to Final Project! Have fun!
A set of scripts, manuals and patches to make synthesizing and downloading circuits from Logisim Evolution onto the Basys3 FPGA board on Linux easier and more seamless.
This project implements the Radix-2 Fast Fourier Transform (FFT) algorithm on an FPGA using Xilinx DSP48 IP blocks. The design leverages the parallel processing capabilities of FPGAs to achieve high performance in signal processing tasks.
Color Detection using Basys3 FPGA
Extremely basic countdown clock project for the Basys 3 FPGA development board.
Logic Analyzer IP Core
FPGA Audio Effect System project for Electronic Engineering course. This project spanned two semesters and was my final year project
CS4362 - Hardware Description Languages. Implemented SNN on an FPGA for Real-Time Handwritten Digit Recognition
关于这个话题
- 清单取自 GitHub 话题页并按 Star 数排序,每次展示前 20 个项目;原始页面见 https://github.com/topics/basys3。
- 该话题在 GitHub 上共有 221 个仓库, 本站收录的是其中最热门的 20 个,不是全量列表。
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- 当前 20 个项目累计 572 Star,覆盖 6 种主要语言,数据更新于 2026-11-08。
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