rfsoc 开源项目推荐（39 个）

strath-sdr /RFSoC-Book

Companion Jupyter Notebooks for the RFSoC-Book.

srsran /zynq_timestamping

Open source Zynq timestamping implementation from Software Radio Systems (SRS)

strath-sdr /rfsoc_ofdm

PYNQ example of an OFDM Transmitter and Receiver on RFSoC.

strath-sdr /rfsoc_radio

将 RFSoC 用作 QPSK/BPSK 无线电收发器的 PYNQ 示例

hipersys-team /lightning

[SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference

strath-sdr /rfsoc_studio

The Strathclyde RFSoC Studio Installer for PYNQ.

strath-sdr /rfsoc_frequency_planner

An RFSoC Frequency Planner developed using Python.

strath-sdr /rfsoc_notebooks

A collection of RFSoC introductory notebooks for PYNQ.

jorgeiglesiasc /advanced-rfsoc-front-end

Advanced multi-band GNSS SDR front-end implementation in an RFSoC integrated circuit. GPL-3.0 license

open-photonics /lightning-lts

[Long Term Support] [SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference

strath-sdr /pynq_agc

Demonstration of Automatic Gain Control with PYNQ

manbhattarai /awg-rfsoc

An arbitrary waveform generator with the Real Digital RFSoC board

functions-lab /SPEAR_plus

SPEAR+: Streaming-Based Multi-Channel SDR Implementation Using the RFSoC Platform

uceeyuf /rfsoc4x2_ernic

100G RDMA (RoCE v2) on RFSoC 4x2 with the AMD ERNIC IP: host RDMA WRITE/READ to PL DDR4 at 98 Gbit/s, byte-exact, Linux rdma-core host

uceeyuf /rfsoc_ofdm

Fork of strath-sdr/rfsoc_ofdm + bare-metal OFDM link on RFSoC 4x2 (JTAG, no PYNQ): H.264 video over DAC_B -> ADC_B at 5.98 / 11.83 / 23.55 Mb/s (BPSK / QPSK / 16-QAM)

uceeyuf /rfsoc_qsfp_offload

Fork of strath-sdr/rfsoc_qsfp_offload + PL-only 100GbE UDP echo on RFSoC 4x2 (JTAG, no PYNQ): 4K400 video loopback at 79.77 Gbit/s each way, 4000/4000 frames byte-exact

sparkainlp-x /oes32-hls

C++ HLS research prototype of OES-32 telemetry-triage checks for AMD ZCU111, with g++ testbenches and bit-exact pybind11 Python bindings. Synthetic stimuli only; FPGA synthesis UNRUN.

JutsFunFor /xczu27dr-rfsoc

From-scratch board support package for a Xilinx XCZU27DR RFSoC board: runnable Tcl for every interface, each one verified on real hardware.

qnngroup /rfsoc_dds

Systemverilog for direct digital synthesis of high-purity sinusoids for use with RFSoCs running at full sample rate

uceeyuf /rfsoc4x2_mts

Bare-metal multi-tile sync on RFSoC 4x2 (JTAG, no PYNQ) + chirp-training skew estimation with sub-sample resolution and sample-accurate alignment: 4 GSPS two-channel loopback, skew ~100 -> -1.00 (MTS) -> -0.002 samples