Litmus helps SREs and developers practice chaos engineering in a Cloud-native way. Chaos experiments are published at the ChaosHub (https://hub.litmuschaos.io). Community notes is at https://hackmd.io/a4Zu_sH4TZGeih-xCimi3Q
fault-simulation 开源项目推荐(21 个)
fault-simulation 话题在 GitHub 上没有填写简介,这里按 Star 数汇总最相关的热门仓库。
热门项目 前 20
按 Star 数排序展示前 20 个 · GitHub 共 21 个仓库A complete open-source design-for-testing (DFT) Solution
FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
Hardware Formal Verification
Simple fault simulator
Source files and documentation for the final assignment of the "Testing and Fault Tolerance" course.
A serial and parallel logic fault simulator on gate level netlists.
Path-Oriented Decision Making (PODEM) algorithm for Automatic Test Pattern Generation (ATPG).
This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.
Fault Simulation | Parallel Fault Simulation | Deductive fault Simulation | Test Coverage
Python-based VLSI Fault Simulator for ISCAS-85 benchmarks. Features a CLI engine for Stuck-at Fault injection, Logic Simulation, and reduced fault lists via Equivalence & Dominance collapsing algorithms.
Scientific tool to generate fault cell-aware models from SPICE cell simulations
RiscV Environment for Simulation (R4VES) is a generic and modular framework that eases the grunt work required in order to perform pre/post-synthesis logic and fault simulation on RISC-V cores based on Model/QuestaSim and Z01X.
Python implementation of Automatic Test Pattern Generation using the PODEM algorithm and SCOAP testability analysis, with four-valued fault logic, ISCAS-style benchmarks, and single stuck-at faults.
A fault simulator that adopts an algorithm called "GODFATHER" created by Pier Paolo Ucchino
a complete guide for users to create a complete open-source ASIC-learning-environment.
VLSI testing and design-for-testability in SystemVerilog: stuck-at fault models, serial fault simulation, an LFSR test-pattern generator and a 4-bit scan chain.
A bench-scale rig for reproducing common industrial machine faults (unbalance, misalignment, bearing wear, abnormal load, flow/level faults, overcurrent) under controlled, repeatable conditions, with a full multi-sensor data-acquisition pipeline for predictive-maintenance research.
AI test generation reinforced by property-based fault simulation
Litmus helps SREs and developers practice chaos engineering in a Cloud-native way. Chaos experiments are published at the ChaosHub (https://hub.litmuschaos.io). Community notes is at https://hackmd.io/a4Zu_sH4TZGeih-xCimi3Q
关于这个话题
- 清单取自 GitHub 话题页并按 Star 数排序,每次展示前 20 个项目;原始页面见 https://github.com/topics/fault-simulation。
- 该话题在 GitHub 上共有 21 个仓库, 本站收录的是其中最热门的 20 个,不是全量列表。
- Star / Fork 每日自动刷新一次,实时数据以 GitHub 为准。
- 当前 20 个项目累计 6122 Star,覆盖 10 种主要语言,数据更新于 2026-11-07。
- 中文介绍来自 GitHub 官方话题说明(github/explore)的机器翻译,可点「查看原文」对照;译文缺失时会先展示原文。